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BF1208D
Dual N-channel dual gate MOSFET
Rev. 01 -- 16 May 2007 Product data sheet
1. Product profile
1.1 General description
The BF1208D is a combination of two dual gate MOSFET amplifiers with shared source and gate2 leads and an integrated switch. The integrated switch is operated by the gate1 bias of amplifier B. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and a very good cross modulation performance during Automatic Gain Control (AGC). Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor has a SOT666 micro-miniature plastic package.
CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling.
1.2 Features
I Two low noise gain controlled amplifiers in a single package. One with a fully integrated bias and one with a partly integrated bias I Internal switch to save external components I Superior cross modulation performance during AGC I High forward transfer admittance I High forward transfer admittance to input capacitance ratio
1.3 Applications
I Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply voltage N digital and analog television tuners N professional communication equipment
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
1.4 Quick reference data
Table 1. Quick reference data Per MOSFET unless otherwise specified. Symbol Parameter VDS ID Ptot |yfs| drain-source voltage drain current total power dissipation forward transfer admittance Conditions DC DC Tsp 109 C f = 100 MHz; Tj = 25 C amplifier A; ID = 19 mA amplifier B; ID = 15 mA Ciss(G1) input capacitance at gate1 f = 100 MHz amplifier A amplifier B Crss NF reverse transfer capacitance f = 100 MHz noise figure YS = YS(opt) amplifier A; f = 400 MHz amplifier B; f = 800 MHz Xmod cross modulation input level for k = 1 %; fw = 50 MHz; funw = 60 MHz at 40 dB AGC amplifier A amplifier B Tj
[1] [2] [3] [4]
[3] [4] [2] [2] [2] [1]
Min 26 25 -
Typ 31 30 2.1 2.1 30 0.9 1.4
Max Unit 6 30 180 41 40 2.6 2.6 1.5 2.0 V mA mW mS mS pF pF fF dB dB
102 102 -
105 105 -
150
dBV dBV C
junction temperature
Tsp is the temperature at the soldering point of the source lead. Calculated from S-parameters. Measured in Figure 33 test circuit. Measured in Figure 34 test circuit.
2. Pinning information
Table 2. Pin 1 2 3 4 5 6 Discrete pinning Description gate1 (AMP A) gate2 gate1 (AMP B) drain (AMP B) source drain (AMP A)
1 2 3 G2 S 6 5 4 AMP A G1A DA
Simplified outline
Symbol
G1B AMP B
sym089
DB
BF1208D_1
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Product data sheet
Rev. 01 -- 16 May 2007
2 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
3. Ordering information
Table 3. Ordering information Package Name BF1208D Description plastic surface-mounted package; 6 leads Version SOT666 Type number
4. Marking
Table 4. BF1208D Marking codes Marking code 4A Type number
5. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS ID IG1 IG2 Ptot Tstg Tj
[1]
Parameter drain-source voltage drain current gate1 current gate2 current total power dissipation storage temperature junction temperature
Conditions DC DC
Min -
Max 6 30 10 10 180 +150 150
Unit V mA mA mA mW C C
Per MOSFET
Tsp 109 C
[1]
-65 -
Tsp is the temperature at the soldering point of the source lead.
250 Ptot (mW) 200
001aac193
150
100
50
0 0 50 100 150 Tsp (C) 200
Fig 1. Power derating curve
BF1208D_1 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
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NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
6. Thermal characteristics
Table 6. Symbol Rth(j-sp) Thermal characteristics Parameter thermal resistance from junction to solder point Conditions Typ 225 Unit K/W
7. Static characteristics
Table 7. Static characteristics Tj = 25 C; unless otherwise specified. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions VG1-S = VG2-S = 0 V; ID = 10 A amplifier A amplifier B V(BR)G1-SS V(BR)G2-SS VF(S-G1) VF(S-G2) VG1-S(th) VG2-S(th) IDS gate1-source breakdown voltage gate2-source breakdown voltage forward source-gate1 voltage forward source-gate2 voltage gate1-source threshold voltage gate2-source threshold voltage drain-source current VG2-S = VDS = 0 V; IG1-S = 10 mA VG1-S = VDS = 0 V; IG2-S = 10 mA VG2-S = VDS = 0 V; IS-G1 = 10 mA VG1-S = VDS = 0 V; IS-G2 = 10 mA VDS = 5 V; VG2-S = 4 V; ID = 100 A VDS = 5 V; VG1-S = 5 V; ID = 100 A VG2-S = 4 V; VDS(B) = 5 V; RG1 = 86 k amplifier A; VDS(A) = 5 V amplifier B IG1-S gate1 cut-off current VG2-S = VDS(A) = 0 V amplifier A; VG1-S(A) = 5 V; ID(B) = 0 A amplifier B; VG1-S(B) = 5 V; VDS(B) = 0 V IG2-S gate2 cut-off current VG2-S = 4 V; VG1-S(B) = 0 V; VG1-S(A) = VDS(A) = VDS(B) = 0 V 50 50 20 nA nA nA
[1] [2]
Min
Typ
Max Unit
Per MOSFET; unless otherwise specified 6 6 6 6 0.5 0.5 0.3 0.4 14 10 10 10 1.5 1.5 1.0 1.0 24 20 V V V V V V V V mA mA
[1] [2]
RG1 connects gate1 (B) to VGG = 0 V (see Figure 3). RG1 connects gate1 (B) to VGG = 5 V (see Figure 3).
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
4 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
20 ID (mA) 16
001aag356
(1)
G1A
(2)
DA
12
(3)
G2
S
8
(4) (5) (6)
G1B RG1 VGG
DB
4
001aac205
0 0 1 2 3 4 VGG (V) 5
(1) ID(B); RG1 = 68 k. (2) ID(B); RG1 = 86 k. (3) ID(B); RG1 = 100 k. (4) ID(A); RG1 = 100 k. (5) ID(A); RG1 = 86 k. (6) ID(A); RG1 = 68 k.
VGG = 5 V: amplifier A is off; amplifier B is on. VGG = 0 V: amplifier A is on; amplifier B is off.
Fig 2. Drain currents of MOSFET A and B as a function of VGG
Fig 3. Functional diagram
8. Dynamic characteristics
8.1 Dynamic characteristics for amplifier A
Table 8. Dynamic characteristics for amplifier A[1] Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 19 mA; unless otherwise specified. Symbol |yfs| Ciss(G1) Ciss(G2) Coss Crss Gtr Parameter forward transfer admittance input capacitance at gate1 input capacitance at gate2 output capacitance reverse transfer capacitance transducer power gain Conditions f = 100 MHz; Tj = 25 C f = 100 MHz f = 100 MHz f = 100 MHz f = 100 MHz BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS NF noise figure f = 11 MHz; GS = 20 mS; BS = 0 S f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) 32 28 24 36 32 28 3.0 0.9 1.1 40 36 33 1.5 1.7 dB dB dB dB dB dB
[2] [2] [2] [2]
Min 26 -
Typ 31 2.1 3.4 0.8 30
Max 41 2.6 -
Unit mS pF pF pF fF
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
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NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
Table 8. Dynamic characteristics for amplifier A[1] ...continued Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 19 mA; unless otherwise specified. Symbol Xmod Parameter cross modulation Conditions input level for k = 1 %; fw = 50 MHz; funw = 60 MHz at 0 dB AGC at 10 dB AGC at 20 dB AGC at 40 dB AGC
[1] [2] [3] For the MOSFET not in use: VG1-S(B) = 0 V; VDS(B) = 0 V. Calculated from S-parameters. Measured in Figure 33 test circuit.
[3]
Min
Typ
Max
Unit
90 102
90 99 105
-
dBV dBV dBV dBV
8.1.1 Graphics for amplifier A
001aaa554
(1)
30 ID (mA) 20
(2) (3)
32 ID (mA)
001aaa555
(1) (2)
(4)
24
(3) (4)
(5)
16
(5) (6)
10
(6)
(7)
8
(7)
(8) (9)
0 0 0.4 0.8 1.2 1.6 2 VG1-S (V)
0 0 2 4 VDS (V) 6
(1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(A) = 5 V; VG1-S(B) = VDS(B) = 0 V; Tj = 25 C.
(1) VG1-S(A) = 1.8 V. (2) VG1-S(A) = 1.7 V. (3) VG1-S(A) = 1.6 V. (4) VG1-S(A) = 1.5 V. (5) VG1-S(A) = 1.4 V. (6) VG1-S(A) = 1.3 V. (7) VG1-S(A) = 1.2 V. (8) VG1-S(A) = 1.1 V. (9) VG1-S(A) = 1 V. VG2-S = 4 V; VG1-S(B) = VDS(B) = 0 V; Tj = 25 C.
Fig 4. Amplifier A: transfer characteristics; typical values
Fig 5. Amplifier A: output characteristics; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
6 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
40 yfs (mS) 30
001aaa556
20 ID(A) (mA) 16
001aac206
(1) (2)
12 20
(3)
8
(4)
10 4
(5) (6)
0 0 8 16 24 ID (mA) 32
0 0 20 40 ID(B) (A) 60
(1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. VDS(A) = 5 V; VG1-S(B) = VDS(B) = 0 V; Tj = 25 C.
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 5 V; VG1-S(B) = 0 V; Tj = 25 C. ID(B) = internal gate1 current = current in pin drain (AMP B) if MOSFET (B) is switched off.
Fig 6. Amplifier A: forward transfer admittance as a function of drain current; typical values
Fig 7. Amplifier A: drain current as a function of internal gate1 current; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
7 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
20 ID (mA) 16
001aaa558
32 ID (mA) 24
001aaa559
(1)
12 16 8
(2) (3) (4) (5) (6)
8 4
0 0 1 2 3 4 Vsup (V) 5
0 0 2 4 VG2-S (V) 6
VDS(A) = VDS(B) = Vsup; VG2-S = 4 V; Tj = 25 C; RG1 = 86 k (connected to ground); see Figure 3.
(1) VDS(B) = 5 V. (2) VDS(B) = 4.5 V. (3) VDS(B) = 4 V. (4) VDS(B) = 3.5 V. (5) VDS(B) = 3 V. (6) VDS(B) = 2.5 V. VDS(A) = 5 V; VG1-S(B) = 0 V; gate1 (AMP A) is open; Tj = 25 C.
Fig 8. Amplifier A: drain current of amplifier A as a function of supply voltage of A and B amplifier; typical values
120 Vunw (dBV) 110
001aac195
Fig 9. Amplifier A: drain current as a function of gate2 voltage; typical values
0 gain reduction (dB) 10
001aac196
20 100 30
90 40
80 0 10 20 30 40 50 gain reduction (dB)
50 0 1 2 3 VAGC (V) 4
VDS(A) = VDS(B) = 5 V; VG1-S(B) = 0 V; fw = 50 MHz; funw = 60 MHz; Tamb = 25 C; see Figure 33.
VDS(A) = VDS(B) = 5 V; VG1-S(B) = 0 V; f = 50 MHz; see Figure 33.
Fig 10. Amplifier A: unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values
Fig 11. Amplifier A: gain reduction as a function of AGC voltage; typical values
BF1208D_1
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Product data sheet
Rev. 01 -- 16 May 2007
8 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
28 ID (mA) 20
001aac197
102 bis, gis (mS) 10 bis 1
001aag357
12 10-1 gis
4 0 10 20 30 40 50 gain reduction (dB)
10-2 10
102 f (MHz)
103
VDS(A) = VDS(B) = 5 V; VG1-S(B) = 0 V; f = 50 MHz; Tamb = 25 C; see Figure 33.
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = VG1-S(B) = 0 V; ID(A) = 19 mA
Fig 12. Amplifier A: drain current as a function of gain reduction; typical values
102 Yfs (mS) 10 fs Yfs
001aag358
Fig 13. Amplifier A: input admittance as a function of frequency; typical values
103 Yrs (S) 102 rs
001aag359
-102 fs (deg) -10
-103 rs (deg) -102
Yrs
1
-1
10
-10
10-1 10
102
f (MHz)
-10-1 103
1 10
102
f (MHz)
-1 103
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = VG1-S(B) = 0 V; ID(A) = 19 mA
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = VG1-S(B) = 0 V; ID(A) = 19 mA
Fig 14. Amplifier A: forward transfer admittance and phase as a function of frequency; typical values
Fig 15. Amplifier A: reverse transfer admittance and phase as a function of frequency; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
9 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
10 bos, gos (mS) 1
001aag360
bos
10-1
gos
10-2 10
102
f (MHz)
103
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = VG1-S(B) = 0 V; ID(A) = 19 mA
Fig 16. Amplifier A: output admittance as a function of frequency; typical values
8.1.2 Scattering parameters for amplifier A
Table 9. Scattering parameters for amplifier A VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 19 mA; VDS(B) = 0 V; VG1-S(B) = 0 V; Tamb = 25 C; typical values. f (MHz) 40 100 200 300 400 500 600 700 800 900 1000 s11 Magnitude (ratio) 0.992 0.99152 0.98685 0.97979 0.97176 0.96209 0.95108 0.93915 0.92742 0.91573 0.90429 Angle (deg) -7.62 s21 Magnitude (ratio) 3.13270 Angle (deg) s12 Magnitude (ratio) Angle (deg) 87.34 85.21 78.32 73.45 69.12 64.73 60.38 56.16 52.16 48.31 44.63 s22 Magnitude (ratio) 0.992 0.99168 0.99047 0.98876 0.98662 0.98424 0.98168 0.97884 0.97630 0.97350 0.97115 Angle (deg) -1.139 -2.93 -5.83 -8.72 -11.57 -14.39 -17.21 -19.97 -22.68 -25.42 -28.14
-3.037 3.21 -15.12 3.11006 -22.49 3.06743 -29.74 3.01634 -36.76 2.95125 -43.63 2.87828 -50.35 2.79946 -56.82 2.71508 -62.95 2.62937 -68.83 2.54239
177.04 0.00763 172.06 0.00182 164.12 0.00350 156.24 0.00511 148.56 0.00664 141.00 0.00805 133.56 0.00931 126.28 0.01042 119.20 0.01141 112.29 0.01224 105.56 0.01297
8.1.3 Noise data for amplifier A
Table 10. Noise data for amplifier A VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 19 mA; VDS(B) = 0 V; VG1-S(B) = 0 V; Tamb = 25 C; typical values; unless otherwise specified. f (MHz) 400 800
BF1208D_1
NFmin (dB) 0.9 1.1
opt (ratio) 0.77 0.73 (deg) 22.7 45.75
rn (ratio) 0.65 0.62
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
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NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
8.2 Dynamic characteristics for amplifier B
Table 11. Dynamic characteristics for amplifier B[1] Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 15 mA; unless otherwise specified. Symbol Parameter |yfs| Ciss(G1) Ciss(G2) Coss Crss Gtr forward transfer admittance input capacitance at gate1 input capacitance at gate2 output capacitance reverse transfer capacitance transducer power gain Conditions f = 100 MHz; Tj = 25 C f = 100 MHz f = 100 MHz f = 100 MHz f = 100 MHz BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS NF noise figure f = 11 MHz; GS = 20 mS; BS = 0 S f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) Xmod cross modulation input level for k = 1 %; fw = 50 MHz; funw = 60 MHz at 0 dB AGC at 10 dB AGC at 20 dB AGC at 40 dB AGC
[1] [2] [3] For the MOSFET not in use: VG1-S(A) = 0 V; VDS(A) = 0 V. Calculated from S-parameters. Measured in Figure 34 test circuit.
[3] [2] [2] [2] [2]
Min 25 31 28 26 90 102
Typ 30 2.1 3.4 0.85 30 35 32 30 3 1.1 1.4 90 98 105
Max Unit 40 2.6 39 36 34 1.7 2.0 mS pF pF pF fF dB dB dB dB dB dB dBV dBV dBV dBV
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
11 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
8.2.1 Graphics for amplifier B
001aag361 001aag362
(1) (4)
30 ID (mA) 20
(1) (2) (3)
24 ID (mA) 16
(2)
(3) (4) (5)
(5)
10
(6)
8
(6) (7)
(7)
0 0 0.4 0.8 1.2 1.6 2.0 VG1-S (V)
0 0 2 4 VDS (V) 6
(1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(B) = 5 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C.
(1) VG1-S(B) = 1.6 V. (2) VG1-S(B) = 1.5 V. (3) VG1-S(B) = 1.4 V. (4) VG1-S(B) = 1.3 V. (5) VG1-S(B) = 1.2 V. (6) VG1-S(B) = 1.1 V. (7) VG1-S(B) = 1 V. VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C.
Fig 17. Amplifier B: transfer characteristics; typical values
Fig 18. Amplifier B: output characteristics; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
12 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
100 IG1 (A) 80
001aag363
40 Yfs (mS) 32
001aag364
(1) (2)
(1) (2) (3)
60
(3)
24
40
(4)
16
(5)
(4)
(5)
20
(6) (7)
8
(6) (7)
0 0 0.4 0.8 1.2 1.6 2.0 VG1-S (V)
0 0 8 16 24 ID (mA) 32
(1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(B) = 5 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C.
(1) VG2-S = 4 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1 V. VDS(B) = 5 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C.
Fig 19. Amplifier B: gate1 current as a function of gate1 voltage; typical values
20 ID (mA) 16
001aag365
Fig 20. Amplifier B: forward transfer admittance as a function of drain current; typical values
20 ID (mA) 16
001aag366
12
12
8
8
4
4
0 0 10 20 30 40 50 IG1 (A)
0 0 1 2 3 4 VGG (V) 5
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C.
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C; RG1 = 86 k (connected to VGG); see Figure 3.
Fig 21. Amplifier B: drain current as a function of gate1 current; typical values
Fig 22. Amplifier B: drain current as a function of gate1 supply voltage; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
13 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
25 ID (mA) 20
001aag367
24 ID (mA) 16
001aag368
(1)
(2)
(1) (2) (3) (4) (5)
15
10
(3) (4) (5) (6) (7) (8) (9)
8
5
0 0 1 2 3 5 VGG = VDS (V) 4
0 0 2 4 VG2-S (V) 6
(1) RG1 = 47 k. (2) RG1 = 56 k. (3) RG1 = 68 k. (4) RG1 = 82 k. (5) RG1 = 86 k. (6) RG1 = 100 k. (7) RG1 = 120 k. (8) RG1 = 150 k. (9) RG1 = 180 k. VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C; RG1 is connected to VGG; see Figure 3.
(1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. VDS(B) = 5 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C; RG1 = 86 k (connected to VGG); see Figure 3.
Fig 23. Amplifier B: drain current as a function of gate1 supply voltage and drain supply voltage; typical values
Fig 24. Amplifier B: drain current as a function of gate2 voltage; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
14 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
50 IG1 (A) 40
(2) (3) (1)
001aag369
120 Vunw (dBV) 110
001aag370
30
(4)
100
(5)
20
90 10
0 0 2 4 VG2-S (V) 6
80 0 20 40 60 gain reduction (dB)
(1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. VDS(B) = 5 V; VDS(A) = VG1-S(A) = 0 V; Tj = 25 C; RG1 = 86 k (connected to VGG); see Figure 3.
VDS(B) = 5 V; VGG = 5 V; VDS(A) = VG1-S(A) = 0 V; RG1 = 86 k (connected to VGG); fw = 50 MHz; funw = 60 MHz; Tamb = 25 C; see Figure 34.
Fig 25. Amplifier B: gate1 current as a function of gate2 voltage; typical values
Fig 26. Amplifier B: unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values
24 ID (mA) 18
001aag372
0 gain reduction (dB) 10
001aag371
20 12 30
6 40
50 0 1 2 3 VAGC (V) 4
0 0 20 40 60 gain reduction (dB)
VDS(B) = 5 V; VGG = 5 V; VDS(A) = VG1-S(A) = 0 V; RG1 = 86 k (connected to VGG); f = 50 MHz; Tamb = 25 C; see Figure 34.
VDS(B) = 5 V; VGG = 5 V; VDS(A) = VG1-S(A) = 0 V; RG1 = 86 k (connected to VGG); f = 50 MHz; Tamb = 25 C; see Figure 34.
Fig 27. Amplifier B: gain reduction as a function of AGC voltage; typical values
Fig 28. Amplifier B: drain current as a function of gain reduction; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
15 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
102 bis, gis (mS) 10
001aag373
102
001aag374
-102
Yfs (mS)
Yfs
fs (deg)
bis 1
10 fs
-10
gis 10-1 10 1 10 102 f (MHz) -1 103
102
f (MHz)
103
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; ID(B) = 15 mA
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; ID(B) = 15 mA
Fig 29. Amplifier B: input admittance as a function of frequency; typical values
103 Yrs (S) 102 rs
001aag375
Fig 30. Amplifier B: forward transfer admittance and phase as a function of frequency; typical values
10 bos, gos (mS) 1 bos
001aag376
-103 rs (deg) -102
Yrs
10
-10
10-1
gos
1 10
102
f (MHz)
-1 103
10-2 10
102
f (MHz)
103
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; ID(B) = 15 mA
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = VG1-S(A) = 0 V; ID(B) = 15 mA
Fig 31. Amplifier B: reverse transfer admittance and phase as a function of frequency; typical values
Fig 32. Amplifier B: output admittance as a function of frequency; typical values
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
16 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
8.2.2 Scattering parameters for amplifier B
Table 12. Scattering parameters for amplifier B VDS(B) = 5 V; VG2-S = 4 V; ID(B) = 15 mA; VDS(A) = 0 V; VG1-S(A) = 0 V; Tamb = 25 C; typical values. f (MHz) 40 100 200 300 400 500 600 700 800 900 1000 s11 Magnitude (ratio) 0.9830 0.98257 0.97956 0.97446 0.96849 0.96112 0.95238 0.94282 0.93319 0.92326 0.91325 Angle (deg) -3.09 -7.62 s21 Magnitude (ratio) 2.96410 2.92951 Angle (deg) s12 Magnitude (ratio) Angle (deg) 87.02 86.41 83.66 81.33 79.12 76.85 74.48 72.29 70.11 67.93 65.65 s22 Magnitude (ratio) 0.9920 0.99190 0.99064 0.98894 0.98688 0.98454 0.98181 0.97880 0.97585 0.97175 0.96801 Angle (deg) -1.22 -3.22 -6.42 -9.59 -12.74 -15.88 -19.02 -22.13 -25.20 -28.30 -31.40
176.88 0.00070 171.69 0.00176 163.43 0.00339 155.20 0.00501 147.13 0.00663 139.15 0.00820 131.26 0.00967 123.50 0.01110 115.92 0.01250 108.46 0.01379 101.13 0.01506
-15.00 2.90869 -22.33 2.86877 -29.56 2.82073 -36.62 2.75891 -43.55 2.68790 -50.37 2.61038 -56.94 2.52719 -63.22 2.44054 -69.31 2.35036
8.2.3 Noise data for amplifier B
Table 13. Noise data for amplifier B VDS(B) = 5 V; VG2-S = 4 V; ID(B) = 15 mA; VDS(A) = 0 V; VG1-S(A) = 0 V; Tamb = 25 C; typical values; unless otherwise specified. f (MHz) 400 800 NFmin (dB) 1.1 1.4 opt (ratio) 0.72 0.68 (deg) 22.83 46.42 0.66 0.64 rn ()
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
17 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
9. Test information
VAGC VDS(A)
5V 4.7 nF
10 k 4.7 nF
L1 2.2 H
G1A G2 G1B
DA S DB
4.7 nF
RGEN 50 Vi
50
4.7 nF
BF1208D
RL 50
4.7 nF
50
RG1
L2 2.2 H 4.7 nF
VGG
0V
VDS(B)
5V
001aag398
Fig 33. Cross modulation test set-up for amplifier A
VAGC VDS(A)
5V 4.7 nF
10 k 4.7 nF
L1 2.2 H
G1A G2 G1B
DA S DB
4.7 nF
50
4.7 nF
BF1208D
4.7 nF
RGEN 50 Vi
50
RG1
L2 2.2 H 4.7 nF
RL 50
VGG
5V
VDS(B)
5V
001aag399
Fig 34. Cross modulation test set-up for amplifier B
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
18 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
10. Package outline
Plastic surface-mounted package; 6 leads SOT666
D
A
E
X
S
YS HE
6
5
4
pin 1 index A
1
e1 e
2
bp
3
wMA Lp detail X
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 0.6 0.5 bp 0.27 0.17 c 0.18 0.08 D 1.7 1.5 E 1.3 1.1 e 1.0 e1 0.5 HE 1.7 1.5 Lp 0.3 0.1 w 0.1 y 0.1
OUTLINE VERSION SOT666
REFERENCES IEC JEDEC JEITA
EUROPEAN PROJECTION
ISSUE DATE 04-11-08 06-03-16
Fig 35. Package outline SOT666
BF1208D_1 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
19 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
11. Abbreviations
Table 14. Acronym AGC DC MOSFET UHF VHF Abbreviations Description Automatic Gain Control Direct Current Metal-Oxide Semiconductor Field-Effect Transistor Ultra High Frequency Very High Frequency
12. Revision history
Table 15. Revision history Release date 20070516 Data sheet status Product data sheet Change notice Supersedes Document ID BF1208D_1
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
20 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
13. Legal information
13.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
13.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
14. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
BF1208D_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 16 May 2007
21 of 22
NXP Semiconductors
BF1208D
Dual N-channel dual gate MOSFET
15. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 8.1.1 8.1.2 8.1.3 8.2 8.2.1 8.2.2 8.2.3 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics for amplifier A. . . . . . . 5 Graphics for amplifier A . . . . . . . . . . . . . . . . . . 6 Scattering parameters for amplifier A . . . . . . . 10 Noise data for amplifier A . . . . . . . . . . . . . . . . 10 Dynamic characteristics for amplifier B. . . . . . 11 Graphics for amplifier B . . . . . . . . . . . . . . . . . 12 Scattering parameters for amplifier B . . . . . . . 17 Noise data for amplifier B . . . . . . . . . . . . . . . . 17 Test information . . . . . . . . . . . . . . . . . . . . . . . . 18 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 Legal information. . . . . . . . . . . . . . . . . . . . . . . 21 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Contact information. . . . . . . . . . . . . . . . . . . . . 21 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 16 May 2007 Document identifier: BF1208D_1

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